Background
CHERI extends conventional processor Instruction-Set Architectures (ISAs) with support for architectural capabilities. One important use for this new hardware data type is in the implementation of safer C/C++ pointers and the code or data they point at. Our technical report, An Introduction to CHERI, provides a more detailed overview of the CHERI architecture, ISA modeling, hardware implementations, and software stack1.
1
Robert N. M. Watson, Simon W. Moore, Peter Sewell, and Peter G. Neumann. An Introduction to CHERI, Technical Report UCAM-CL-TR-941, Computer Laboratory, September 2019.